The demonstration video of the MCL86 core running on the Lattice XO2 Breakout Board has been posted to YouTube. The FPGA is the XO2-7000 which is around $10 USD.
Here it is: MCL86 8086 core running on Lattice XO2 Breakout Board
The video demonstrates how the MCL86 core, 2KB of RAM and a UART are all that is needed to create a practical embedded control processor with a host interface.
The total register utilization is a modest 8% of the $10 Lattice XO2-7000 which leaves most of the FPGA’s registers available for important user logic.
The MCL86 is about as small as you can get when it comes to embedded processor cores that support a practical instruction set.
Please visit us at: www.MicroCoreLabs.com
Here are some tools that have been verified to work on Linux and/or Windows 7. Some of them are DOS tools which can run under DOSBox.
Assembly: A86 (DOSBox), MASM (DOSBox), NASM (Linux/Windows 7), as86 (Linux), emu8086 (Windows 7)
C/C++: Open Watcom (Windows 7), bcc (Linux)
My preference is to write in assembly code and use A86 to generate a .COM file which I can simply copy into the FPGA code ROM.
Due to popular demand we have run the MCL86 through Xilinx ISE targeting the Spartan-6 series FPGAs.
The MCL86 coupled with a fully-loaded 8088 BIU easily fits in an XC6SLX16 consuming 4% of the slices at a speed of over 100Mhz.
For designers using the MCL86 with minimal BIUs the footprint would be even smaller…
We just coupled the MCL86 core with an optimized Bus Interface Unit (BIU) and ported it to the Lattice XO2 Breakout Board where it consumes 551 (8%) of the XO2-7000’s registers.
This system-on-a-chip consists of the MCL86 EU core, on-chip RAM/ROM, and a UART and leaves 92% of this $10 FPGA’s registers unused and available
A YouTube video of it running will be posted soon!
Nearly 24,000 page views to date of Steve Liebson’s blog posting on the MCL86 core.
8088 microprocessor IP core fits in 308 LUTs, runs at 180MHz on a Kintex-7 FPGA