I uploaded some videos of the system running a few applications and games. My hope was to test the MCL65 on a variety of programs that could demonstrate the instruction as well as cycle accuracy of the core.
The MC65 is an ultra-small footprint, microsequencer-based, 100% instruction-set compatible, cycle-exact NMOS 6502 core that can be implemented in any FPGA or ASIC technology which can utilize as little as 252 LUTs (0.77%) of a Xilinx Spartan-7 FPGA. It has also been ported to a Xilinx Spartan-3 device where it uses about 10% of the part.
The MCL65 is instruction set compatible with the original NMOS version of the 6502 which was the processor used in computers and game machines such as the Commodore VIC20, Apple II, Atari-2600, and the Commodore-64 as well as many others.
100% Compatible with NMOS 6502 instruction set
Cycle-exact with the original processor
All signals from the original DIP packaged CPU are supported such as SO, SYNC, INT_n, and NMI_n.
Bus timing is identical to the original 6502. All over-fetches, read/write sequences, and addressing mode wrapping/errors are supported.
BCD (Binary Coded Decimal) addition and subtraction are supported.
The MCL65 6502 core is an embedded processor core implemented with a high performance 32-bit microsequencer which can utilize as little as 252 Xilinx LUTs and two block RAMs in a Spartan-7 FPGA. The core is 100% compatible with the original processor and is designed to be cycle-exact which will allow it to be used in applications where firmware cycle timing is critical.
The core was tested on a Commodore VIC-20, Apple II Plus, and the Atari-2600.
Here are a few pictures I took of the system in action in the Apple II Plus.